add stm32mp157
This commit is contained in:
@ -0,0 +1,790 @@
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/**
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******************************************************************************
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* @file startup_stm32mp15xx.s
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* @author MCD Application Team
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* @brief STM32MP15xx Devices vector table for GCC based toolchain.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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.section .startup_copro_fw.Reset_Handler,"ax"
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr sp, =_estack /* set stack pointer */
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* _sidata: End of code section, i.e., begin of data sections to copy from.
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* _sdata/_edata: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the clock system intitialization function.*/
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bl SystemInit
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// ldr r0, =SystemInit
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// blx r0
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/* Call static constructors */
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bl __libc_init_array
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// ldr r0, =__libc_init_array
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// blx r0
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/* Call the application's entry point.*/
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bl main
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//ldr r0, =main
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//blx r0
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LoopForever:
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b LoopForever
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval : None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M4. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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g_pfnVectors:
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.word _estack // Top of Stack
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.word Reset_Handler // Reset Handler
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.word NMI_Handler // NMI Handler
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.word HardFault_Handler // Hard Fault Handler
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.word MemManage_Handler // MPU Fault Handler
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.word BusFault_Handler // Bus Fault Handler
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.word UsageFault_Handler // Usage Fault Handler
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.word 0 // Reserved
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.word 0 // Reserved
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.word 0 // Reserved
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.word 0 // Reserved
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.word SVC_Handler // SVCall Handler
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.word DebugMon_Handler // Debug Monitor Handler
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.word 0 // Reserved
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.word PendSV_Handler // PendSV Handler
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.word SysTick_Handler // SysTick Handler
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// External Interrupts
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.word WWDG1_IRQHandler // Window WatchDog 1
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.word PVD_AVD_IRQHandler // PVD and AVD through EXTI Line detection
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.word TAMP_IRQHandler // Tamper and TimeStamps through the EXTI line
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.word RTC_WKUP_ALARM_IRQHandler // RTC Wakeup and Alarm through the EXTI line
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.word RESERVED4_IRQHandler // Reserved
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.word RCC_IRQHandler // RCC
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.word EXTI0_IRQHandler // EXTI Line0
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.word EXTI1_IRQHandler // EXTI Line1
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.word EXTI2_IRQHandler // EXTI Line2
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.word EXTI3_IRQHandler // EXTI Line3
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.word EXTI4_IRQHandler // EXTI Line4
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.word DMA1_Stream0_IRQHandler // DMA1 Stream 0
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.word DMA1_Stream1_IRQHandler // DMA1 Stream 1
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.word DMA1_Stream2_IRQHandler // DMA1 Stream 2
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.word DMA1_Stream3_IRQHandler // DMA1 Stream 3
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.word DMA1_Stream4_IRQHandler // DMA1 Stream 4
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.word DMA1_Stream5_IRQHandler // DMA1 Stream 5
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.word DMA1_Stream6_IRQHandler // DMA1 Stream 6
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.word ADC1_IRQHandler // ADC1
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.word FDCAN1_IT0_IRQHandler // FDCAN1 Interrupt line 0
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.word FDCAN2_IT0_IRQHandler // FDCAN2 Interrupt line 0
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.word FDCAN1_IT1_IRQHandler // FDCAN1 Interrupt line 1
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.word FDCAN2_IT1_IRQHandler // FDCAN2 Interrupt line 1
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.word EXTI5_IRQHandler // External Line5 interrupts through AIEC
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.word TIM1_BRK_IRQHandler // TIM1 Break interrupt
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.word TIM1_UP_IRQHandler // TIM1 Update Interrupt
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.word TIM1_TRG_COM_IRQHandler // TIM1 Trigger and Commutation Interrupt
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.word TIM1_CC_IRQHandler // TIM1 Capture Compare
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.word TIM2_IRQHandler // TIM2
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.word TIM3_IRQHandler // TIM3
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.word TIM4_IRQHandler // TIM4
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.word I2C1_EV_IRQHandler // I2C1 Event
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.word I2C1_ER_IRQHandler // I2C1 Error
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.word I2C2_EV_IRQHandler // I2C2 Event
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.word I2C2_ER_IRQHandler // I2C2 Error
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.word SPI1_IRQHandler // SPI1
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.word SPI2_IRQHandler // SPI2
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.word USART1_IRQHandler // USART1
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.word USART2_IRQHandler // USART2
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.word USART3_IRQHandler // USART3
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.word EXTI10_IRQHandler // External Line10 interrupts through AIEC
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.word RTC_TIMESTAMP_IRQHandler // RTC TimeStamp through EXTI Line
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.word EXTI11_IRQHandler // External Line11 interrupts through AIEC
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.word TIM8_BRK_IRQHandler // TIM8 Break Interrupt
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.word TIM8_UP_IRQHandler // TIM8 Update Interrupt
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.word TIM8_TRG_COM_IRQHandler // TIM8 Trigger and Commutation Interrupt
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.word TIM8_CC_IRQHandler // TIM8 Capture Compare Interrupt
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.word DMA1_Stream7_IRQHandler // DMA1 Stream7
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.word FMC_IRQHandler // FMC
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.word SDMMC1_IRQHandler // SDMMC1
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.word TIM5_IRQHandler // TIM5
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.word SPI3_IRQHandler // SPI3
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.word UART4_IRQHandler // UART4
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.word UART5_IRQHandler // UART5
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.word TIM6_IRQHandler // TIM6
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.word TIM7_IRQHandler // TIM7
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.word DMA2_Stream0_IRQHandler // DMA2 Stream 0
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.word DMA2_Stream1_IRQHandler // DMA2 Stream 1
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.word DMA2_Stream2_IRQHandler // DMA2 Stream 2
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.word DMA2_Stream3_IRQHandler // DMA2 Stream 3
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.word DMA2_Stream4_IRQHandler // DMA2 Stream 4
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.word ETH1_IRQHandler // Ethernet
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.word ETH1_WKUP_IRQHandler // Ethernet Wakeup through EXTI line
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.word FDCAN_CAL_IRQHandler // FDCAN Calibration
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.word EXTI6_IRQHandler // EXTI Line6 interrupts through AIEC
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.word EXTI7_IRQHandler // EXTI Line7 interrupts through AIEC
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.word EXTI8_IRQHandler // EXTI Line8 interrupts through AIEC
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.word EXTI9_IRQHandler // EXTI Line9 interrupts through AIEC
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.word DMA2_Stream5_IRQHandler // DMA2 Stream 5
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.word DMA2_Stream6_IRQHandler // DMA2 Stream 6
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.word DMA2_Stream7_IRQHandler // DMA2 Stream 7
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.word USART6_IRQHandler // USART6
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.word I2C3_EV_IRQHandler // I2C3 event
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.word I2C3_ER_IRQHandler // I2C3 error
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.word USBH_OHCI_IRQHandler // USB Host OHCI
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.word USBH_EHCI_IRQHandler // USB Host EHCI
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.word EXTI12_IRQHandler // EXTI Line12 interrupts through AIEC
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.word EXTI13_IRQHandler // EXTI Line13 interrupts through AIEC
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.word DCMI_IRQHandler // DCMI
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.word CRYP1_IRQHandler // Crypto1 global interrupt
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.word HASH1_IRQHandler // Crypto Hash1 interrupt
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.word FPU_IRQHandler // FPU
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.word UART7_IRQHandler // UART7
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.word UART8_IRQHandler // UART8
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.word SPI4_IRQHandler // SPI4
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.word SPI5_IRQHandler // SPI5
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.word SPI6_IRQHandler // SPI6
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.word SAI1_IRQHandler // SAI1
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.word LTDC_IRQHandler // LTDC
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.word LTDC_ER_IRQHandler // LTDC error
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.word ADC2_IRQHandler // ADC2
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.word SAI2_IRQHandler // SAI2
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.word QUADSPI_IRQHandler // QUADSPI
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.word LPTIM1_IRQHandler // LPTIM1 global interrupt
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.word CEC_IRQHandler // HDMI_CEC
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.word I2C4_EV_IRQHandler // I2C4 Event
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.word I2C4_ER_IRQHandler // I2C4 Error
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.word SPDIF_RX_IRQHandler // SPDIF_RX
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.word OTG_IRQHandler // USB On The Go HS global interrupt
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.word RESERVED99_IRQHandler // Reserved
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.word IPCC_RX0_IRQHandler // Mailbox RX0 Free interrupt
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.word IPCC_TX0_IRQHandler // Mailbox TX0 Free interrupt
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.word DMAMUX1_OVR_IRQHandler // DMAMUX1 Overrun interrupt
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.word IPCC_RX1_IRQHandler // Mailbox RX1 Free interrupt
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.word IPCC_TX1_IRQHandler // Mailbox TX1 Free interrupt
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.word CRYP2_IRQHandler // Crypto2 global interrupt
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.word HASH2_IRQHandler // Crypto Hash2 interrupt
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.word I2C5_EV_IRQHandler // I2C5 Event Interrupt
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.word I2C5_ER_IRQHandler // I2C5 Error Interrupt
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.word GPU_IRQHandler // GPU Global Interrupt
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.word DFSDM1_FLT0_IRQHandler // DFSDM Filter0 Interrupt
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.word DFSDM1_FLT1_IRQHandler // DFSDM Filter1 Interrupt
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.word DFSDM1_FLT2_IRQHandler // DFSDM Filter2 Interrupt
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.word DFSDM1_FLT3_IRQHandler // DFSDM Filter3 Interrupt
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.word SAI3_IRQHandler // SAI3 global Interrupt
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.word DFSDM1_FLT4_IRQHandler // DFSDM Filter4 Interrupt
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.word TIM15_IRQHandler // TIM15 global Interrupt
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.word TIM16_IRQHandler // TIM16 global Interrupt
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.word TIM17_IRQHandler // TIM17 global Interrupt
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.word TIM12_IRQHandler // TIM12 global Interrupt
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.word MDIOS_IRQHandler // MDIOS global Interrupt
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.word EXTI14_IRQHandler // EXTI Line14 interrupts through AIEC
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.word MDMA_IRQHandler // MDMA global Interrupt
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.word DSI_IRQHandler // DSI global Interrupt
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.word SDMMC2_IRQHandler // SDMMC2 global Interrupt
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.word HSEM_IT2_IRQHandler // HSEM global Interrupt
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.word DFSDM1_FLT5_IRQHandler // DFSDM Filter5 Interrupt
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.word EXTI15_IRQHandler // EXTI Line15 interrupts through AIEC
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.word nCTIIRQ1_IRQHandler // Cortex-M4 CTI interrupt 1
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.word nCTIIRQ2_IRQHandler // Cortex-M4 CTI interrupt 2
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.word TIM13_IRQHandler // TIM13 global interrupt
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.word TIM14_IRQHandler // TIM14 global interrupt
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.word DAC_IRQHandler // DAC1 and DAC2 underrun error interrupts
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.word RNG1_IRQHandler // RNG1 interrupt
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.word RNG2_IRQHandler // RNG2 interrupt
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.word I2C6_EV_IRQHandler // I2C6 Event Interrupt
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.word I2C6_ER_IRQHandler // I2C6 Error Interrupt
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.word SDMMC3_IRQHandler // SDMMC3 global Interrupt
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.word LPTIM2_IRQHandler // LPTIM2 global interrupt
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.word LPTIM3_IRQHandler // LPTIM3 global interrupt
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||||
.word LPTIM4_IRQHandler // LPTIM4 global interrupt
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||||
.word LPTIM5_IRQHandler // LPTIM5 global interrupt
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.word ETH1_LPI_IRQHandler // ETH1_LPI interrupt
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.word RESERVED143_IRQHandler // Reserved
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.word MPU_SEV_IRQHandler // MPU Send Event through AIEC
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.word RCC_WAKEUP_IRQHandler // RCC Wake up interrupt
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||||
.word SAI4_IRQHandler // SAI4 global interrupt
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.word DTS_IRQHandler // Temperature sensor interrupt
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.word RESERVED148_IRQHandler // Reserved
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||||
.word WAKEUP_PIN_IRQHandler // Interrupt for all 6 wake-up pins
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|
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.size g_pfnVectors, .-g_pfnVectors
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||||
/*******************************************************************************
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||||
*
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||||
* Provide weak aliases for each Exception handler to the Default_Handler.
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||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
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||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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||||
|
||||
.weak HardFault_Handler
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||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak RESERVED4_IRQHandler
|
||||
.thumb_set RESERVED4_IRQHandler,Default_Handler
|
||||
|
||||
.weak RESERVED99_IRQHandler
|
||||
.thumb_set RESERVED99_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH1_LPI_IRQHandler
|
||||
.thumb_set ETH1_LPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak RESERVED143_IRQHandler
|
||||
.thumb_set RESERVED143_IRQHandler,Default_Handler
|
||||
|
||||
.weak WWDG1_IRQHandler
|
||||
.thumb_set WWDG1_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_AVD_IRQHandler
|
||||
.thumb_set PVD_AVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_IRQHandler
|
||||
.thumb_set TAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_ALARM_IRQHandler
|
||||
.thumb_set RTC_WKUP_ALARM_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC2_IRQHandler
|
||||
.thumb_set ADC2_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT0_IRQHandler
|
||||
.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT0_IRQHandler
|
||||
.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT1_IRQHandler
|
||||
.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT1_IRQHandler
|
||||
.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN_CAL_IRQHandler
|
||||
.thumb_set FDCAN_CAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI5_IRQHandler
|
||||
.thumb_set EXTI5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI10_IRQHandler
|
||||
.thumb_set EXTI10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_TIMESTAMP_IRQHandler
|
||||
.thumb_set RTC_TIMESTAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI11_IRQHandler
|
||||
.thumb_set EXTI11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_IRQHandler
|
||||
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_IRQHandler
|
||||
.thumb_set TIM8_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_IRQHandler
|
||||
.thumb_set TIM6_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH1_IRQHandler
|
||||
.thumb_set ETH1_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH1_WKUP_IRQHandler
|
||||
.thumb_set ETH1_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH1_LPI_IRQHandler
|
||||
.thumb_set ETH1_LPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI6_IRQHandler
|
||||
.thumb_set EXTI6_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI7_IRQHandler
|
||||
.thumb_set EXTI7_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI8_IRQHandler
|
||||
.thumb_set EXTI8_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_IRQHandler
|
||||
.thumb_set EXTI9_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBH_OHCI_IRQHandler
|
||||
.thumb_set USBH_OHCI_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBH_EHCI_IRQHandler
|
||||
.thumb_set USBH_EHCI_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI12_IRQHandler
|
||||
.thumb_set EXTI12_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI13_IRQHandler
|
||||
.thumb_set EXTI13_IRQHandler,Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRYP1_IRQHandler
|
||||
.thumb_set CRYP1_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH1_IRQHandler
|
||||
.thumb_set HASH1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART7_IRQHandler
|
||||
.thumb_set UART7_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART8_IRQHandler
|
||||
.thumb_set UART8_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI5_IRQHandler
|
||||
.thumb_set SPI5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI6_IRQHandler
|
||||
.thumb_set SPI6_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_IRQHandler
|
||||
.thumb_set LTDC_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_ER_IRQHandler
|
||||
.thumb_set LTDC_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI2_IRQHandler
|
||||
.thumb_set SAI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_EV_IRQHandler
|
||||
.thumb_set I2C4_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_ER_IRQHandler
|
||||
.thumb_set I2C4_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPDIF_RX_IRQHandler
|
||||
.thumb_set SPDIF_RX_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_IRQHandler
|
||||
.thumb_set OTG_IRQHandler,Default_Handler
|
||||
|
||||
.weak IPCC_RX0_IRQHandler
|
||||
.thumb_set IPCC_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak IPCC_TX0_IRQHandler
|
||||
.thumb_set IPCC_TX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX1_OVR_IRQHandler
|
||||
.thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak IPCC_RX1_IRQHandler
|
||||
.thumb_set IPCC_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak IPCC_TX1_IRQHandler
|
||||
.thumb_set IPCC_TX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRYP2_IRQHandler
|
||||
.thumb_set CRYP2_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH2_IRQHandler
|
||||
.thumb_set HASH2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C5_EV_IRQHandler
|
||||
.thumb_set I2C5_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C5_ER_IRQHandler
|
||||
.thumb_set I2C5_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak GPU_IRQHandler
|
||||
.thumb_set GPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT0_IRQHandler
|
||||
.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT1_IRQHandler
|
||||
.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT2_IRQHandler
|
||||
.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT3_IRQHandler
|
||||
.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI3_IRQHandler
|
||||
.thumb_set SAI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT4_IRQHandler
|
||||
.thumb_set DFSDM1_FLT4_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM12_IRQHandler
|
||||
.thumb_set TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_IRQHandler
|
||||
.thumb_set MDIOS_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI14_IRQHandler
|
||||
.thumb_set EXTI14_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDMA_IRQHandler
|
||||
.thumb_set MDMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak DSI_IRQHandler
|
||||
.thumb_set DSI_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC2_IRQHandler
|
||||
.thumb_set SDMMC2_IRQHandler,Default_Handler
|
||||
|
||||
.weak HSEM_IT2_IRQHandler
|
||||
.thumb_set HSEM_IT2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT5_IRQHandler
|
||||
.thumb_set DFSDM1_FLT5_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_IRQHandler
|
||||
.thumb_set EXTI15_IRQHandler,Default_Handler
|
||||
|
||||
.weak nCTIIRQ1_IRQHandler
|
||||
.thumb_set nCTIIRQ1_IRQHandler,Default_Handler
|
||||
|
||||
.weak nCTIIRQ2_IRQHandler
|
||||
.thumb_set nCTIIRQ2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM13_IRQHandler
|
||||
.thumb_set TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak DAC_IRQHandler
|
||||
.thumb_set DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG1_IRQHandler
|
||||
.thumb_set RNG1_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG2_IRQHandler
|
||||
.thumb_set RNG2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C6_EV_IRQHandler
|
||||
.thumb_set I2C6_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C6_ER_IRQHandler
|
||||
.thumb_set I2C6_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC3_IRQHandler
|
||||
.thumb_set SDMMC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM3_IRQHandler
|
||||
.thumb_set LPTIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM4_IRQHandler
|
||||
.thumb_set LPTIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM5_IRQHandler
|
||||
.thumb_set LPTIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak MPU_SEV_IRQHandler
|
||||
.thumb_set MPU_SEV_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_WAKEUP_IRQHandler
|
||||
.thumb_set RCC_WAKEUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI4_IRQHandler
|
||||
.thumb_set SAI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DTS_IRQHandler
|
||||
.thumb_set DTS_IRQHandler,Default_Handler
|
||||
|
||||
.weak RESERVED148_IRQHandler
|
||||
.thumb_set RESERVED148_IRQHandler,Default_Handler
|
||||
|
||||
.weak WAKEUP_PIN_IRQHandler
|
||||
.thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
|
||||
|
Reference in New Issue
Block a user